To get the credit buttons to lock up when the counter is zero, use a gate on each credit button along with an address decoder tied to the counter bits. I'm not going to be clear headed in the following, paying no attention to high/low, just the concept.
You can use one of those P=Q logic comparator type chips in the 74xxx series (would have to look up an exact part number). Say the counter has 8 bits and those feed into the 7 segment drivers. Assume the logic is set up so all bits = 0 represents a digit count value of 00. If more bits are needed use more chips. If there are unused bits, tie them all zero on both P and Q sides so they will always "match".
The P=Q chip has inputs for P and inputs for Q. You tap into the bits from the counter and feed them to the P inputs. You tie the Q inputs all to ground because that's what you're comparing P to, to get a match of zero count value. With this P=Q chip, the output goes high or low or whatever, maybe there's 2 outputs, when the counter P inputs all equal the hard coded Q compare value you set.
So now you have a way to get one logic signal going to a fixed state ONLY when the counter is zero. Use inverters wherever necessary to end up with the desired logic levels.
Get a NAND gate or an AND gate, depending on how all the logic levels match up. Intercept the credit switches so they each feed into one input of a gate, and the other input of each gate connects to the P=Q output trigger (through inverter if necessary). The output of each gate goes to the keyboard coin inputs.
Another thing to keep in mind is the switches are active low with the common ground hookup, so if you are setting up logic to look for a key press, you are looking for a logic Low. Also when you wire switches to a logic input such as the gates in this circuit, you'll need a pull up resistor at the same gate input as the switch wire to ensure the level is high rather than "disconnected/floating/ambiguous" when the switch isn't pressed.
So there is a counter that has all its bits equal to logic low when the counter is zero. you're hooking those bits to the P inputs of a P=Q comparator. You're fixing the Q inputs all to logic low so that the output triggers when counter is zero. You're taking the trigger and routing it to one input of 4 AND/NAND gates and sending a credit switch with pull up resistor to each of the other gate inputs. The gate outputs are going to the keyboard credit inputs. Logic is inverted as necessary so that when the button is pressed AND the counter is NOT zero, the keyboard input will be logic low.
If the counter is non-zero value, the gates should automatically prevent the credit switch from passing through to the keyboard input.