in a comerical game >older<
there is no single bootrom chip presay..it is normaly shared..
now that beening said in some game's let's say packman
if e3 fail's board will not boot,but also this apply's to ram/video ram/sound ram
which is what the erpom's load the game into.
now the wdt watch dog timer
all it dose is monitor a few control line's,not nessarly reset,but rather _reset,
if that line goes sideway's for xx >mil sec's< the wdt kick's in and reset's the board
depending on the wdt layout it may also sample _ce and _cw and _clk
if them 4 line's are working right through it's sampler >nor gate as a rule<
then the timer count's out and is told by the cpu to reset it's self as all is ok,but if the mirco dose not flag it on time,the wdt will do a _reset,and reset your board..
as to your other thread about wdt and the batt,u have me at loss as i went through the schematic,and i can see a hard reset point..this is where i would start.
ed