If I was engeneering this, I would use a 555 timer in oneshot mode triggered by the sync and the output holding the sync line low so that the next sync will not get thru. It wont help for under speed syncs, but it will result in whatever is being fed into it being divided down to something less then 15kHz (or whatever you choose the duration of the timer to allow thru)
Would be easier on a microcontroller tho.