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Author Topic: Help identifying serial pinout and touch-screen type on an open-frame LCD  (Read 1361 times)

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rx7racer

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  • I want to build my own arcade controls!
-wave- Hello, everyone - I hope someone has some insight they can offer me with this problem. 

I bought a bunch of arcade cabinet parts a while back and finally got around to doing something with them.  Of the many things among the lot is five of these 22" open-frame LCD displays, and I was amused to find that they had what I believe to be serial ports labeled "touch-screen", as you can see in the pictures.   

However, I am completely perplexed as to how they actually interface to anything, because I can find no documentation whatsoever about them, and I have been unsuccessful at determining the pinout and protocol; armed with a voltmeter, an oscilloscope, high-intensity lighting and a loupe, I am out of ideas. 

Here's what I know so far:

The board has two chips of interest, one is an 8-bit MCU, the STM8S003F3 by ST and the other is a TTL-to-RS232 driver chip, a Maxlinear SP232EEN.

There is a SPST toggle attached to P1, across pins 1 and 2 (from right to left, pin 1 is indicated on the solder side), marked on the chassis as "WLM <-> POG"
The four-pin header J1 is connected to an RJ-45 header, marked as "touchscreen", testing all four pins for continuity shows map of 1 -> 1,2  2 -> 3,4  3 -> 5,6 , 4 -> 7,8 (J1->RJ45)
Five-pin header P3 is connected to the touch-screen frame assembly via three wires, 1, 2, and 4 (right to left as indicated by solder side of board)
Two-pin header P4 is connected to the LCD inverter power board, which is also connected to the main video board (in a y-split header) and provides +5V to the board, and ground.
Four-pin header P2 is not used, but it appears that they go directly to the MCU's SPI interface for debug/factory burn

Normally I would expect to find J1 to be a breakout for RS-232 level signals, like RTS, DSR, TXD, and ground, but no such luck.   I spent several hours tracing out the signals on the board, to no avail.

On the MCU, there is a single UART, occupying pins 1, 2, and 3 (clock, tx, and rx), which connects to the RS-232 line driver but in a weird way:

R2OUT -> UART_RXD on MCU
T2IN -> UART_TXD on MCU

R2IN -> J1_PIN3 via R4
T2OUT -> J1_PIN4 via R5

J1_PIN2 -> P3_PIN3, P3_PIN1
J1_PIN1 -> P1_PIN1 / P1_PIN2 (toggle connects either pin)


Further investigation of the signaling has me thinking either all of the TTL signaling is tied to a common ground, as is the RS-232, and therefore is muddling up my ham-handed signal tracing, or R4 and R5 are functioning to pull the RS-232 line voltages down closer to TTL, which would explain why I am seeing +5V/-5V and +7V, and +12V on J1 from various pins to ground. 

Moving back up in the proverbial haystack, connection to a serial port of what I believe to be the TX/GND pair makes prettypuke on the display at various baud rates and signaling; from previous experience with touch screen displays, I tested the common combinations of 9600 8N1, 4800 8N1, 1200 7E1, 2400 7E1, 19200 8N1 and even 38400 8N1.    The most legible (meaning, coherence in sequences between panel touch interaction, sequence length, and repeat of identical characters) was with 9600 8N1, but the character sequences were mainly of ASCII control characters (SOH, STX, NUL, and others with ASCII characters in between) in what appeared to me like data packets.

Firing up my array of drivers from ELO and 3M came up nothing.    Anyone have any ideas?  I have attached pictures of the board in question, and if it helps, anything else I can add just ask..   I have five of these things, and am going to turn one of them into a MAME cabinet and the rest probably into jukeboxes, if I can get the touch control working.  Help! :D :D TIA!!  :banghead:

** Edit **

Even further investigation of the P3 header has led me to determine that the touch-screen frame's interface is via SPI, as I traced out the MISO, MOSI, clock, and Vdd lines to the MCU from P3; as it is only connecting to MISO, clock, and Vdd (even though the MOSI line is pinned to the header) half-duplex SPI is highly likely.   
« Last Edit: May 19, 2018, 05:59:37 am by rx7racer »