RAM speed/frequency for Arcade games causes errors

[vanwatson]

If a logic arcade game board has slow speed RAM chip and you install faster RAM chips that arcade game doesn't like this, any reason why you can't switch the RAM chips from slow speed to faster speed or vise versa?

If a logic arcade game board has fast speed RAM chips and I put in slower RAM chip the arcade game has errors and locks up

If a logic arcade game board has slow speed RAM chips and I put in Fast RAM chips the arcade game doesn't like it either

What does the RAMS speed/frequency mean to the logic game board?

[yotsuya]

Homework?

[lilshawn]

Homework?

heh

I have never had much issue with installing faster SRAM chips.

you have to realize the speed listed on the chip is the time it takes to access the data and spit it out to it's data channels... therefore a 70ns chip is faster than a 150ns chip.

too slow sram results in corruption of the data stream as the data is not available when the cpu polls the data lines and it's still showing old data because the new data is still being read out.

[ed12]

homework

start here
u may need to re-punch it into google
>analog.com/search/default.aspx?query=ram&local=en<
some of there d/l's are larger then our up-load size..
u will catch the drift

ed

[vanwatson]

The RAM chips also have different voltages , some are at 5 volts and others are at different voltages

So you can't put in a RAM chip that has different voltages

When you use a device programmer to device test a RAM chip it will tell you the voltages of the RAM chip
and sometimes you can change the voltage in the device programmer

you have to realize the speed listed on the chip is the time it takes to access the data and spit it out to it's data channels... therefore a 70ns chip is faster than a 150ns chip.

The RAM chips is only on the data lines? not the address lines or control lines?

[lilshawn]

the chip logic itself operates at 5 volts. ROM chips often have a WRITE voltage that must be run at to erase and write data to the chip (12 volts or more) but those are usually EEPROMS which are different from RAM.

[vanwatson]

Most arcade games use Eprom chips, and I use EEProm chips in place of the Eprom chips or it won't work?

Some arcade games use Eprom chips 2464

Can I use different Eprom chip model numbers or do you have to use the same Eprom model numbers for some reason?

I'm guessing each Eprom chip has a different pin out so you can't use them 

[ed12]

eeprom vrs eprom
electricaly eraseable programable  read olny memory
eraseable programable read olny memory

1 has to be done in a programer >u need ultra voliet light to erase it<
1 can be done on the fly,like the board it's self, this type dose not need ultra voliet light to erase it
eprom
eeprom

no stick with eprom,there are sub's for each
leg work is all that is needed

and unless u never caught it
ram's are totaly different

ed

[vanwatson]

no stick with eprom,there are sub's for each

Why are Eprom chips better then using EEPROM chips?

So I shouldn't Upgrade my EPROM chips to EEPROM chips on arcade logic boards?

Can I Upgrade my ERPOM chips to EEPROM chips on arcade logic boards?

[ed12]

but the question is :why: ?
u have to understand the 2 beast's u are working with
1-can be programed via the board in question
2- cannot be programed via the board >need's ultra voilet light to erase it first<
up to late 90's there was no such thing in video and pinball game's
and if u want to get tech today we call it :flash:,this is open for debate,but the
theroy is the same.
so again why ?

ed

[vanwatson]

All the 80's arcade games use EPROM chips

I want to "upgrade" them to EEPROM chip in arcade games, how can I do this?

[vanwatson]

EPROM chips are more sensitive to getting erased from light and don't like being re-programmed over and over, they will fail more

I have never had much issue with installing faster SRAM chips.

Watch this video, this guy did have problems with the sound RAMs being the wrong timing

What is the problem he had with his sound RAM's i don't really get the timing problem

Please explain to me about his problem, because he used different RAM chips but they are at a different timing


Gauntlet II PCB Repair Sound Not Working

[SavannahLion]

Videos suck. I can find a solution in a minute and a half by scanning text and photos whereas I would be forced to waste fifteen minutes of my life watching a video.

Moving along.

You have to look at the bigger picture sometimes.

I'm not sure what the RAM specs are for the Gauntlet machines (I can't find any data sheets for them) but glancing over the partial schematics I have (the ones from Kong appear to be cropped off for some reason?) it appears to use a lot of LS IC's implying a TTL based circuit. Depending on how the RAM is wired in, it might be a problem of the TTL circuit simply being unable to drive the HC IC if the new RAM was such. I understand this is why HCT type IC's were introduced. Alternatively, if the wrong RAM type is used, the TTL circuit might not even be strong enough to drive the CMOS IC. Therefor, data corruption.

Timing, in a strict manner, might be an issue if you don't udate all the RAM (and ROM and whatever else) on the same bus. I believe Gauntlet uses about a dozen of them? That's just off the top of my head. Point is, the timing might be such that a faster IC might seize the data bus before another, slower, IC on the same bus has had a chance to release the bus. This is important to understand since a CPU like the 6502 doesn't have a dual data bus like say... a modern microcontroller like an AVR. So the CPU has to fetch an instruction (typically from ROM of some type) then has to do something in RAM. The 6502 is specifically designed to work with slower RAM/ROM.

Another issue, going back to the TTL circuit, might be an open collector vs. a push-pull arrangement. open collectors are great in a circuit because you can build really nice AND/OR circuits without having to use extra IC's at a cost of power consumption. But if you toss in a new non-open collector or open drain IC without a buffer, your new IC will fight the rest of the other IC's on the data bus. This is especially true if you can't force the output to float or into a Hi-Z state.

You can help us by not acting so vague. As I mentioned above, it really helps if you tell us what the big picture is.

[vanwatson]

open collectors are great in a circuit because you can build really nice AND/OR circuits without having to use extra IC's at a cost of power consumption.

You mean by using diodes to create an OR and AND circuit? or using transistors or fets?

the TTL circuit might not even be strong enough to drive the CMOS IC. Therefor, data corruption

So you're saying that there is two different types of RAM, TTL RAM and CMOS RAM?

TTL circuits current is lower and CMOS circuits current is higher?

This is important to understand since a CPU like the 6502 doesn't have a dual data bus like say.

The 6502 has 8 data lines and each data line is bi-directional

So what do you mean by dual data bus?

So the CPU has to fetch an instruction (typically from ROM of some type) then has to do something in RAM. The 6502 is specifically designed to work with slower RAM/ROM.

Yes true, but multiple people said they had never had a problem putting in faster or slower RAM/ROM

This is especially true if you can't force the output to float or into a Hi-Z state.

So you're saying that Open-collector components you can force the output to float or into a Hi-Z state
Push-Pull components you "can't force the output to float or into Hi-Z state

I just thought TTL circuits you can't force the output to float or into a Hi-Z state
Only CMOS circuit you can force the output to float or into a Hi-Z state

Point is, the timing might be such that a faster IC might seize the data bus before another, slower, IC on the same bus has had a chance to release the bus.

Yes True, But the guy in the video is also talking about another timing issue as well

 

[SavannahLion]

open collectors are great in a circuit because you can build really nice AND/OR circuits without having to use extra IC's at a cost of power consumption.

You mean by using diodes to create an OR and AND circuit? or using transistors or fets?

Google Open Collector and Open Drain. It will tell you everything you need to know.

the TTL circuit might not even be strong enough to drive the CMOS IC. Therefor, data corruption

So you're saying that there is two different types of RAM, TTL RAM and CMOS RAM?

TTL circuits current is lower and CMOS circuits current is higher?

No. Generally the opposite is true but this isn't always the case. Google TTL and CMOS to understand the difference.

This is important to understand since a CPU like the 6502 doesn't have a dual data bus like say.

The 6502 has 8 data lines and each data line is bi-directional

So what do you mean by dual data bus?

Dual data bus means exactly what it sounds like. There are systems out there where the instruction data bus is different than the data data bus. Technically they're both data buses but that's just nomenclature. Google Von Neumann Architecture and Harvard Architecture for two such examples. The vast majority of CPU's or MCU's out there are Von Neumann with a growing number of them being hybrid Von Neumann/Harvard designs.

Another example is old VRAM chips that had dual data and address buses.

So the CPU has to fetch an instruction (typically from ROM of some type) then has to do something in RAM. The 6502 is specifically designed to work with slower RAM/ROM.

Yes true, but multiple people said they had never had a problem putting in faster or slower RAM/ROM

Look at the big picture. What systems was the RAM used in? How as the software written? What else is on the bus? What is the old and new clock speed? There are other factors to consider other than strictly speed.

This is especially true if you can't force the output to float or into a Hi-Z state.

So you're saying that Open-collector components you can force the output to float or into a Hi-Z state
Push-Pull components you "can't force the output to float or into Hi-Z state

I just thought TTL circuits you can't force the output to float or into a Hi-Z state
Only CMOS circuit you can force the output to float or into a Hi-Z state

Hi-Z or float state isn't dependent on the open collector properties of an IC.

What I was talking about there is trying to use a CMOS totem pull IC in a circuit expecting an open collector. If the circuit is dependent on draining the HI state of the TTL ouput to make a ZERO, the totem pole will fight that, possibly to the point of burning out. Not all circuits actually send the IC into a HI-Z or float state when there are more than one device on the data bus. So even if the CMOS replacement has a OE pin, it may not actually be used by the circuit.

In the end it really depends on the IC. TTL might as well be a float state as 1 since their "pull ups" are generally weak. That's partly why you can build elegant AND/OR circuits using their open collector properties if the IC is spec'ed as such. You're not going to destroy them if you drain the line away. On the other side of the coin, not all CMOS IC's have a Hi-Z state available on the output.

Point is, the timing might be such that a faster IC might seize the data bus before another, slower, IC on the same bus has had a chance to release the bus.

Yes True, But the guy in the video is also talking about another timing issue as well

 I listened to the video on the way to work. It's the same general issue. The 6502 ran somewhere between 1 and 3MHz. I think the Gauntlet machine was 1.7MHz? I don't have the schematic with me. But, it's too early in the morning so my math might be off, that works out to be a little under 700ns for the data bus. The RAM had an access time of 250ns or 100ns? I forget which. Considering ROM was in there along with a Pokey there was a lot of data flying back and forth and the engineers fine tuned the circuitry and software to get the most out of that hardware. In other words there is probably an address change on the address line and the CPU and Pokey were still using the data right up until the RAM put the new data on the bus.

The things I mentioned are simply a few problems I've come across where using a different spec'ed IC than the one in the existing circuit will cause problems. There are a myriad of other situations where you might be forced to absolutely use that specific IC and no other, including the so-called replacements from other manufacturers. The topic is already convoluted enough in a general sense without detailing which circuit or arcade cab you're trying to find out about.

[vanwatson]

that works out to be a little under 700ns for the data bus.

What formula do you use to get the data buss time? you take the CPU/MPU frequency

the TTL circuit might not even be strong enough to drive the CMOS IC. Therefor, data corruption

What do you mean the TTL circuit is not strong enough to drive CMOS IC chips?

CMOS IC's have a Hi-Z state available on the output.

I never know TTL component can have a HI-Z output , i have never seen this before

I have only seen CMOS components have a HI-Z output , not TTL components

In other words there is probably an address change on the address line

Yes switches or encoders can do address changes on the address line

The RAM had an access time of 250ns or 100ns?

So the guy in the video is talking about the RAM's access time?

[ed12]

74ls/74h54xx has tri state stamped all over it
older 74x/74s no as a rule
but when they brought out 74ls and ceritinily 74h bet your dollar's it is there
just resreach 74h52xx or 74h3xx it will dawn on u..

some cmos run's between 9-12volt
ttl run's at 5v exculsive
so if a 5volt unit is to drive a 9-14 unit ?
u need a inverter to raise the level

all time is a fuction of the cpu in question and a divide there of

ed

[vanwatson]

Mostly they use the Tri State on buss lines, data lines, address lines, control lines.

Why would you want to use the tri state? so it doesn't sink or drain off the voltage or data on the buss lines?

Any other use of using the Tri state?

some cmos run's between 9-12volt
ttl run's at 5v exculsive
so if a 5volt unit is to drive a 9-14 unit ?
u need a inverter to raise the level

Yes they are logic buffers or level shifters

RAM replacements from other manufacturers.

What do you look for in RAM replacements
1.) The Access time
2.) What other timings?
3.) The RAM's frequency/speed?

[ed12]

in real trems
tri-state goe's to high-z
which mean's it is not apperant to the data by any mean's
it is like a open switch

ram is a good question..i tend to look at >all< of the device's but most important
the >ram<, for the simple reason 1 size dose not fit all
1=speed
2=voltage
3=access time
4=size
6=ammont of control line's used
7=ammount of data to store/pass
thats just the start

ed

[vanwatson]

How do you know which speed and access time for a RAM chips should be when you look at a schematic or knowing the CPU/MPU frequency?

The CPU/MPU frequency sets the speed and access time for a RAM chip?

I still don't understand the difference between the RAMs speed and access time

[ed12]

here
>wikipedia.org/wiki/Random-access_memory<
its a good guide

ed

[vanwatson]

I'm not sure how they get the "MATH" for the data buss frequency/time because it's in Nanoseconds
The RAM's frequency is in the Megahertz

When Looking at an arcade schematic how do you calculate/math formula to get the RAM's speed and Access time? and calculate the data buss frequency/time?

[vanwatson]

Atari using Peripherial Interface Adaptor, PIA RAM chips ,  6502

The Joysticks and red fire button go to the PIA RAM chip

PIA RAM chips are an interface plus a storage RAM

In Arcade games they don't use PIA RAM chips, the console buttons and encoder wheels/rollers go "DIRECT" to a RAM? or an interface circuit before RAM?

[SavannahLion]

Stop... I know I told you to look at the big picture, but you can't hope to understand how to build a house without first learning how to use a hammer.

In Arcade games they don't use PIA RAM chips, the console buttons and encoder wheels/rollers go "DIRECT" to a RAM? or an interface circuit before RAM?

Don't bother with the PIA, it's use won't become clear until you understand more of what's going on with the rest of the circuit. By the way, PIA typically don't have RAM. I suppose they can, I just don't recall any that do.

When Looking at an arcade schematic how do you calculate/math formula to get the RAM's speed and Access time? and calculate the data buss frequency/time?

Understand that MHz is the frequency or the number of cycles per second. It's a function of time, but not time itself.

To figure out how long one cycle is at MHz in terms of ns, the formula is T = 1000/MHz. Therefor, a 1MHz CPU has a cycle time of 1000ns. At 1.7MHz, that cycle time is ~588ns.

The CPU/MPU frequency sets the speed and access time for a RAM chip?

No, not always. Sort of. Not really. Depends on a number of factors that is outside of the scope of discussion I want to write about.

You also can't predetermine what the RAM access time should be just going off the CPU speed. That's actually a very poor indicator. You need to look at how the CPU uses the RAM. The 6502 is specifically designed to work with slower (translated to cheaper) RAM, unlike other chips of that era.

I suggest you understand something a little simpler, like the CPU itself. The 6502 is a blindingly simple and very nice to learn from. It's also an astonishingly good example to learn timing from since the Atari 2600 uses a variant known as the 6507. In my honest opinion, the 2600, with its very strong community and excellent software support, is probably the very best system to learn everything you could care to know about hardware timing. Not only would you be Racing the Beam you'll have to contend with the mis-matched clock rates of the 6507 and the T.I.A. The T.I.A. is like a beautiful 50's pin up. She'll give you tons of excitement, but she ain't going to cook you breakfast the next morning. Other 6502 based systems often use a better video interface, like your high school sweetheart after she gained 80lbs you want to settle in with who'll cook you breakfast but they're not very exciting in bed. The 6532 RIOT in the 2600 is like an older child. Enjoy

Do not ask questions about the 2600, Google it instead.

I won't do any more quotes, I have no time to fuss with this.

If you wish to understand why TTL sometimes cannot drive a CMOS circuit, you need to understand their differences first. This is why I told you to Google it.

[lilshawn]

can't tell if i'm doing someones homework....

[vanwatson]

To figure out how long one cycle is at MHz in terms of ns, the formula is T = 1000/MHz. Therefor, a 1MHz CPU has a cycle time of 1000ns. At 1.7MHz, that cycle time is ~588ns

.

So the Cycle time of a CPU should match the RAM's frequency and Access time? if the CPU cycle time is at 588nS the RAM's frequency should be at 1.7Mhz? and Access time should be at 588nS?

Is the CPU cycle time how many bits it's outputting?

example if the CPU is an 8 bit at 1.7MHZ , The CPU is outputting 8 bits every 558nS?

If the CPU is an 8 bit at 1MHZ , the CPU is outputting 8 bits every 1000nSec?

[SavannahLion]

To figure out how long one cycle is at MHz in terms of ns, the formula is T = 1000/MHz. Therefor, a 1MHz CPU has a cycle time of 1000ns. At 1.7MHz, that cycle time is ~588ns

.

So the Cycle time of a CPU should match the RAM's frequency and Access time? if the CPU cycle time is at 588nS the RAM's frequency should be at 1.7Mhz? and Access time should be at 588nS?

Is the CPU cycle time how many bits it's outputting?

example if the CPU is an 8 bit at 1.7MHZ , The CPU is outputting 8 bits every 558nS?

If the CPU is an 8 bit at 1MHZ , the CPU is outputting 8 bits every 1000nSec?

No.

[SavannahLion]

can't tell if i'm doing someones homework....

Or some dude from India trying to keep his job

[lilshawn]

the CPU cycle length is irrelevant.

it's the time to ACCESS said data in RMA that needs to be addressed (heh heh)


here is a quick and dirty how ram works.

1: the CPU requests data
2: the CPU waits for the data to be ready
3: the CPU reads the data.

how the ram works:

1: the RAM receives the request for data from the CPU.
MARK
2: the RAM reads the data in the area requested.
3: the RAM changes it's output data pins to reflect the data requested.
MARK
4: the CPU reads the data from the output pins.

the time between "MARK's" is the access time (in nanoseconds) and must be shorter than the CPU is willing to wait. if the ram is too slow, the CPU reads the output data pins on the ram and it's still old data (resulting in "corrupted" (read as duplicate) data streaming back to the CPU for processing) because the system is VERY simple, it's prone to errors. these errors are not accounted for in ANY way, thus the only way to recover is to reset the system and start over.

thus, the RAM/ROM/EPROM/EEPROM you replace must be:

1: electrically compatible
2: the same speed or faster access time.

[vanwatson]

This is what Wiki said about the Z80 about RAM access time

WIKI QUOTE:
memory chip affordability access times around 450-250 ns in the 1980s typically determining the fastest possible access time, this meant that such designs were locked to a significantly longer clock cycle (i.e. lower internal clock speed) than the Z80.

So its true that ALL arcade games that use a Z80 CPU RAM chips have to have an access time from 450nSec to 250nSec? 

[yotsuya]

can't tell if i'm doing someones homework....