Reset on Logic Boards

[vanwatson]

Some logic boards have a Reset button, how do you know if the Reset circuit is working or not?

If a logic board doesn't have a Reset button, what can you do to know if the Reset circuit is working or not?

[ed12]

easy,there is multi way's
as u have a scope,hook it to the micro processer's reset line
and power cycle the board,u should see it go high to low >reset<,
same thing apply's using a multi meter >digital best here<,
or a simple logic probe..
the transison from high to low is reset
now if the board is giving no logic
then make sure reset then clk is working
u can then probe data line's they should be toggling.
get's board level tech from here

ed

[vanwatson]

power cycle the board,u should see it go high to low >reset<,

Yes true

Some Reset circuits are 555 timers and others use a Decade counter plus a watchdog signal

The watchdog signal comes from the CPU?

What other Reset circuits have you seen besides a 555 timer and decade counter?

Reset
   a.) 4 bit Decade counter
   b.) Watchdog signal generated by the CPU or MPU

RESET
   a.) When Low this input line resets the CPU during " power Up Condition"
   b.) Watchdog counter can also Reset the CPU

[vanwatson]

probe data line's they should be toggling.

Are data lines always toggling?

Are data lines good or bad when they are a high state or low state?

[ed12]

no matter how they obtain reset
it is alway's high to low about that simple..

data line's show the logic is flowing on the board
adress line's will show a high or low state (depending on _ce or _cw),
control line's are as a rule set to a logic state for (x) where (x) = either
mil sec's or a tad more,but as a rule u need a good logic analizer to see there state's.

ed

[vanwatson]

What is the Watchdog circuit for? i don't get why they use a watchdog circuit, any reasons why

adrress line's will show a high or low state (depending on _ce or _cw),

How would a technician know the _ce or _cw should be?
Or does the technician just put the logic probe on the CPU's _ce or _cw pins?

control line's are as a rule set to a logic state for (x) where (x) = either

So control lines are either stuck high or low? depending on what?

[ed12]

wdt is there for the name sake
watch dog timer,hence  a line or 2 feed's back to it to keep alive >wdt<
if it fail's it poll's a _ce or _cw line to :halt: any or all action's until the logic problem is fixed..that is what it is for..

>How would a technician know the _ce or _cw should be?
Or does the technician just put the logic probe on the CPU's _ce or _cw pins?
<

all microprocesser's have manual's for the showing there pin-out's
it is there u will find the refernce

>So control lines are either stuck high or low? depending on what?<

that is all logic depented
at a xx time the micro may >via-eerpom/prom/ram< demand room on the stack
it is called a :push:,this is because xx code was to be invoked and or a memory refresh is demanded,and or a reset of the register's

ed

[vanwatson]

The Inputs to the RESET circuit is an AC signal about 3.6 volts , they use an Opto coupler across the Secondary of a transformer. When the power switch turns On the AC signals goes to the input of the RESET circuit

Full Wave Opto Couple they call it