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analog pot to analog pot adapter. An EE question.
SavannahLion:
Thanks MonMotha, now I have something to search on with the 2600. I've been reading the documentation but that's not a phrase I've come across yet.
I've been wanting to feed the ADC a PWM signal but couldn't figure out how the antiquated hardware would respond.
MonMotha:
--- Quote from: SavannahLion on June 24, 2011, 12:00:11 pm ---Thanks MonMotha, now I have something to search on with the 2600. I've been reading the documentation but that's not a phrase I've come across yet.
I've been wanting to feed the ADC a PWM signal but couldn't figure out how the antiquated hardware would respond.
--- End quote ---
Ug, that's a somewhat complicated one.
You may get by with using a resistor to an open-collector IO (or just use a FET to ground and PWM the gate). The resistor should be fairly small: maybe 100 ohms, but it will depend on the cap used in the ramp compare A/D setup and what kind of charge is put on it at reset. If your PWM frequency is MUCH faster than the sampling rate, you might get it to work reasonably well. You'll probably have to play with the duty cycle some.
The idea is that you want to discharge the cap within the A/D at a certain rate based on your PWM. You do this by draining some charge off it whenever the PWM is "on". As you vary the duty cycle of the PWM, you'll discharge the cap at a faster or slower rate.
If you had access to the sample clock of the A/D, this is fairly easy: just send a hard discharge after the necessary elapsed time to trigger the compare. However, I don't think you have access to that clock without hacking the 2600.
A constant current sink would work better than a switched resistor to ground, but is more difficult to build. If you have trouble figuring out what PWM duty cycle you need to get a given input code, you might try using a constant current sink. There are various ways to build one. I can describe some, if you wish.
SavannahLion:
--- Quote from: MonMotha on June 25, 2011, 01:55:58 am ---
--- Quote from: SavannahLion on June 24, 2011, 12:00:11 pm ---Thanks MonMotha, now I have something to search on with the 2600. I've been reading the documentation but that's not a phrase I've come across yet.
I've been wanting to feed the ADC a PWM signal but couldn't figure out how the antiquated hardware would respond.
--- End quote ---
Ug, that's a somewhat complicated one.
You may get by with using a resistor to an open-collector IO (or just use a FET to ground and PWM the gate). The resistor should be fairly small: maybe 100 ohms, but it will depend on the cap used in the ramp compare A/D setup and what kind of charge is put on it at reset. If your PWM frequency is MUCH faster than the sampling rate, you might get it to work reasonably well. You'll probably have to play with the duty cycle some.
The idea is that you want to discharge the cap within the A/D at a certain rate based on your PWM. You do this by draining some charge off it whenever the PWM is "on". As you vary the duty cycle of the PWM, you'll discharge the cap at a faster or slower rate.
If you had access to the sample clock of the A/D, this is fairly easy: just send a hard discharge after the necessary elapsed time to trigger the compare. However, I don't think you have access to that clock without hacking the 2600.
A constant current sink would work better than a switched resistor to ground, but is more difficult to build. If you have trouble figuring out what PWM duty cycle you need to get a given input code, you might try using a constant current sink. There are various ways to build one. I can describe some, if you wish.
--- End quote ---
My understanding on how the 2600 ADC works and what you're describing seems to conflict. Let me get back to you on that.
Thanks for the offer about the circuit, let me see if I can find some information about a constant current sink and read up on it first. See if I can't save us all some time.
Slightly OT. As near as I can tell the 2600 community is rather interesting. There's a lot of amateur level folks trying to add improvements that are kind of kludging through understanding the old technology. Some are right, some are dead wrong (eg some seem to think the *'s in the circuit schematic stands for a 1-bit buffer. I'm reasonably certain this isn't true, especially for TTL circuits). Then you got this group that seem to be like Randy or Andy but.... well, I don't know. Kind of hard to explain. It's like the difference between BOYAC and KLOV. One group just wants cabs that work, the other is about preservation and neither group wants to admit their own shortcomings. :\
MonMotha:
Do you have a better description for how the 2600's analog inputs are set up? The above should work on a PC joystick input, but I'm not entirely familiar with how the 2600 is set up.
SavannahLion:
Not really. I have the schematics and programming manual from Atari Age
Bomarc Schematics:
http://www.atariage.com/2600/archives/schematics/index.html
The link above has schematics for two versions labeled, CX2600 and CX2600A. I have a 1980 Rev8 board so it's closer to the "A" drawing. I have my suspicions there are more than just those two since there are Heavy Sixers, Vaders, Jrs etc. And my board is Revision 8 so....
The paddles schematic is in "Accessories" in the above link.
Back on topic, the pins of interest are 37-40 on the TIA. AtariAge has schematics for it as well:
http://www.atariage.com/2600/archives/schematics_tia/index.html
I'll readily confess I'm still trying to digest that thing. It's the size really. I like to print my schematics out on one sheet and examine them that way. I have a hard time moving schematics in four different directions as I study the circuit. Not sure how EE people can get away with designing entire high end PU's with a bazillion transistors without ever printing any of it out. :dizzy:
In my spare time, I've been examining the Programming documents. This is what the STELLA PG says about the pots:
--- Quote ---12.1 Dumped Input Ports (INPT0 thru INPT3)
These four ports are used to read up to four paddle controllers. Each paddle controller contains an adjustable pot controlled by the knob on the controller. The output of the pot is used to charge a capacitor in the console, and when the capacitor is charged the input port goes HI. The microprocessor discharges this capacitor by writing a "1" to D7 of VBLANK then measures the time it takes to detect a logic one at that port. This information can be used to position objects on the screen based on the position of the knob on the paddle controller.
--- End quote ---
I thought the TIA measures the amount of time it takes to discharge the pots but I found the following blurb (while writing this post) later in the PG that re-words and it's a little clearer IMHO. I missed this last time I examined the PG, not sure why.....
--- Quote ---B. Dumped Input Ports (I0 through I3)
These 4 input ports are normally used to read paddle position from an external potentiometer-capacitor circuit. In order to discharge these capacitors each of these input ports has a large transistor, which may be turned on (grounding the input ports) by writing into bit 7 of the register VBLANK. When this control bit is cleared the potentiometers begin to recharge the capacitors and the microprocessor measures the time required to detect a logic 1 at each input port.
As long as bit 7 of register VBLANK is zero, these four ports are general purpose high impedance input ports. When this bit is a 1 these ports are grounded.
--- End quote ---
This makes a lot more sense really. I had a hard time wrapping my head around what I thought was some kind of bizarre negative logic. Now that my head is on straight.....
If I got the logic right, a PWM by itself will never work properly. With a 50% duty cycle, the charge in the cap will never reach 5v since 1/2 the time it's held high and 1/2 the time it's draining off any excess charge and averaging the voltage to ~2.5v. An analog pot will eventually pull the cap all the way to 5v or near enough while the TIA holds the pin in a HiZ state.
Is that right? Even with a FET, I'm still draining that cap.
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